The present invention relates generally to an integrated circuit (IC) design, and more particularly to a stack resistor structure for integrated circuits.
An IC often contains many resistors. For example, an analog-to-digital converter (ADC) may include many groups of resistors for dividing the voltage. Ideally, the resistance of the groups of resistors should match in order to divide the voltage equally. Conventionally, the resistors are fabricated by forming a number of silicided or non-silicided polysilicon layers on a silicon wafer. The resistors can also be fabricated by forming N-type or P-type doped regions in the semiconductor substrate of the wafer.
One drawback of the conventional resistor is that it requires a large surface area. For example, for a reference voltage resistor-ladder used in an 8-bit ADC, the resistor formed on a polycide layer with sheet resistivity of 10 ohm/sq needs an area of approximate 30 μm2 to provide 1 ohm resistance. As another example, the resistor formed on a metal layer with sheet resistivity of 40 mohm/sq needs an area of approximate 625 μm2 to provide 1 ohm resistance.
Moreover, the conventional resistors have relatively poor resistance-matching uniformity. This creates uneven voltages when the resistors are used as voltage dividers in an ADC.